To not impede the design process much of the rigidity normally required in the creation of footprints has been relaxed. This makes it easier to quickly create footprints. The editor does monitor the designer's progress and automatically corrects the the footprint as it is created. However some checks are only appropriate when the designer has completed the creation. These final checks are done only when the designer signals that he is done and that the final rigorous checks can be completed by the software. Failing to complete "Validation of Footprints" will create potential problems when these unvalidated footprints are used in designs. "Unable to find pin.." or "Unable to connect wire to pin..." are typical errors which will result when bad footprints are used.

You should only have one layer attributed as a RATS LAYER. Leave it on layer 20. This will allow you to keep track of what remains to be routed. Then just use one of the other layers (there can be more than one) and use those additional layers to hold the manual jumpers. This means that you route to the point that you can and then switch to one of the manual wire layers and then run the track to the point were you can return to a regular copper routing layer. You will have vias automatically inserted at those transition points. These wire layers should not be part of any fabrication tooling but can be added to the Check Print Tooling to produce instructions for the fabricator. You can of course use different Layer colors for the manual wires to aid in visually seeing them during the design process.

1. Go to the Via panel thru the Document Preferences.
2. In the Via Stack window select the "DUPLICATE STACK" button and Duplicate stack #1
3. Then switch to that stack
4. Dimension the pad and set the drill hole size as needed
5. Note the stack number for this stack which you have created

Each via used in the network management system with PCB-ST specifies which stack it will use by using that stack's reference number. Therefore to use a specific via stack you will need to change the reference it currently uses. To re-assign a Via Stack Reference proceed as follows:

1. Locate the via you need to reassign.
2. In the overhead tool Bar select a data layer on which a track or rat line connects to the via in question.
3. Then with the pointer click on the edge of the via (avoid the hole).
4. The system should have detected the selection. You should then be able to select "CMD/Control" and "I" keys (or by menu selection) to bring up the info dialogue for the via. You can then set then new reference index for that via stack.

This a problem which has arisen in the newer Apple operating systems. Apple has changed the scaling of the menus on Video screens with very high DPI settings. This results in the old window position stored in the file to appear under the new Menu. The system is supposed to let the ST know so that the application can automatically reposition the window, but sometimes this does not work; especially in older versions.

However you have some options to deal with this situation.

1. Reduce the DPI vertical setting for your new monitor to less than 800. Or...
2. Hold the OPTION Key down while Opening the document from the FILE Menu. This will force the application to reposition and resize the window rather than use the information saved in the older file. Or...
3. Upgrade to the latest version of PCB-ST

Unfortunately, the printing sequence is fixed 32 thru 1 and there is no reversal option. We will add that to the wish list. For now the best option is to do a screen capture when the display is they way you want it. You can then print the captured image.

This is something that is in development. But since this affects autorouting requirements, this is not scheduled as part of the 3.0 & 3.1 layout product releases this year.

Nevertheless you can incorporate curved traces by first creating a footprint which incorporates copper arcs with pins at each end of the arc. Be careful when using these symbols in your designs as they will be treated as devices and may cause synchronization problems with schematics through the ECO management process.

This is scheduled for version 3.1 .

Though this may not seem like it at the moment, this is a very important feature (layer re-mapping) in PCB-ST because it can save hours of work when using a mix of library sources.

When you create a library symbol you place graphic elements on various data layers. each of these data layers may have been attributed with a property such as TOP Pads, BOTTOM PADS, etc.. Since users are free to use and arrange data layers as needed to support a specific design approach a possible problem can arise when re-using symbols in a different design wherein the assignment and arrangement of the various data layers can be quite different. This is where the Layer-Re-Mapping concept steps in. Rather than simply doing a straight one-to-one copy of the library symbol to an design window the software first scans the library layering attributes and compares them to the design windows current layering attributes. For example it looks at data layer (1) one in the library and then sees that it is attributed as a TOPSILK property. It then scans the design window looking for the first available design data layer which has the matching attribute property. From this it develops a partial re-mapping table.

After it completes the first scan it then repeats the scan, but this time it tries to complete the mapping by doing a one-to-one assignment of the data layers on the remaining unassigned library data layers where the target design layer has not as yet been used in the results of the first pass.

If necessary the software will make one more final pass and take any remaining unassigned library data layers and assign them what ever design layers are still free.

In the event that the software may have concerns about the re-mapping that it has done it will post the re-mapping table for you to review/re-edit before the transfer is made.

Therefore to avoid seeing the re-mapping tables it is important that you first make sure that the design window is appropriately attributed to receive the footprints you will be placing.

One final important note: This same re-mapping principle is used when copying and pasting between design windows. This allows you to easily copy and paste between radically different design configurations with minimal needed cleanup.

Generally the answer would be NO. The real issue is whether or not the Object has any pin attributes. If it does then the software treats the object as an electrical device and thus expects there to be a valid reference designator associated with the object. A reference designator is required so the the ECO manager can track and maintain synchronization with a schematic.

The ECO Manager is trying to maintain sync with the Schematic for the layout. In PCB-ST vias are automatically maintained by the net management software. You should never have to manually place a via by placing a pad from ST's pads menu. Placing a pad manually effectively places a (1) one pin device into ST's device list. This single pad is automatically assigned a reference designator. Therefore when you re-import the ECO from the Schematic the ECO Manager sees that there are extra devices which are not on the Schematic's device list and thus removes these extra devices because the Schematic's ECO is the primary controlling record.

PICT is an early Macintosh graphic file format. This document format is only on Macintosh based systems. If you try importing a PICT file, PCB-ST will only process the vector based components present in the file. Since the PICT format permits the inclusion of BitMaps and regions, these latter graphic data descriptions are not supported and are thus disregarded. When these are encountered they will usually generate a warning dialogue indicating that problems were encountered in processing the image file.

Starting with Rev 3 of ST you have two new options for importing graphic data. ST now supports Importing/Exporting of DXF format documents. This gives high resolution data exchange with CAD systems which support AutoCAD's DXF format. In addition ST also now allows you to import BMP format images for use as templates when trying to reconstruct very old PCB's which have been scanned.

If you do not have your source document in any of the supported formats we recommend that you use GraphicConvertor (available on the Web) to to migrate your source image to one of the our supported formats.

Steer was/is always meant to highlight the nets rats primarily. It will also highlight routed tracks as well in the current view. Please note that this will not be persistent since if you are working in any area of the board you usually are changing your nets by selecting different pins thus highlighting new nets or re-highlighting the one you are working with.

You can use the FIND Net option. Using that with Find Next will walk you around the board and highlight every segment in the specified Net, a segment at a time.

ST always searches its known list of libraries. If you want to narrow the list that is searched you need to first move the undesired libraries away from the application by at least two folder levels. This way when you re-launch the ST application only the libraries you want will be found and thus only they will be searched.

First of all, Ctrl-M is for use with SMT/SMD devices primarily. These devices reside either on TOP PADS or BOTTOM PADS. If a through hole device is placed on the Common Pads data layer it does not have a complimentary data layer since it is already common to all the others. That's why it won't work as you wish.

However there are several ways to go about this.

BEFORE PLACEMENT

• When placing the device use the Orientation and mirroring controls prior to placement.

AFTER PLACEMENT

• You have the MOVE ELEMENTS... options in the edit dialogue. This is tedious because you have to move the various elements on different layers to the corresponding layers as separate steps. Then you also have to rotate and mirror so that you have the footprint properly oriented for bottom side mounting. It is possible to make mistakes if you are not careful.
  
• The best alternative is to first move the pads from the Common PADS layer to the TOP PADS Layer using the MOVE Elements command. Then use the CTRL-M command to move the device to the other side. This moves everything: reducing the number of steps required. Then using the MOVE Elements Command move the Thru Hole pads back to the Common PADS Layer.

Thermals are placed on data layers whose Name matches the name of an imported net name. For example if the incoming net carries the name "GND" then the software knows to place thermals on the data layer carrying that same name. ("Thermals: GND" won't map because its name is "Thermals: GND" and not simply "GND" .) Then in the Fabrication Tooling definition you specify which data layers are used to create the finished fabrication film for each fabricated layer of your design. Thus for a copper layer which has a copper plane you would define a tool which has the "COMMON PADS" + "GND"(thermals data layer) + GNDMASK....etc. Gerber 274X supports complex imaging instructions allowing the complex assembly of masks without the need to instruct the board fabricator. You should be able to view each fabrication negative in the Gerber Viewer to see if you have assembled the Gerber commands correctly.

ST always searches its known list of libraries. If you want to narrow the list that is searched you need to first move the undesired libraries away from the application by at least two folder levels. This way when you re-launch the ST application only the libraries you want will be found and thus only they will be searched.

ST keeps internal data which permits the layout to remain synchronized with the governing schematic. Therefore when you replace a footprint because you discover that it has an error, it is usually advisable to retain the internal synch data and therefore you would select "Repair". If on the other hand the footprint being replaced is entirely wrong then of course you would select "New".

The latter situation can also be handled by changing the footprint specification for the part in the governing schematic and then bring in the new ECO from the schematic into the layout. This will rip out the old footprint and bring in the new footprint.

Yes you can. To accomplish this correctly, you must :

1. Take the old designs and resequence the reference designators so that the portions you will be copying do not overlap. Be sure to synchronize the respective layouts to these resequenced schematics.
2. In the ST Layout module disable the "Re-Label After Paste.." option in the Document Preferences panel for your new layout window.
3. Copy the Schematic portions and and Layout portions to their new respective design windows.
4. Save the new design windows.
5. Produce an ECO from your new schematic design project (Do Not do any reference designator resequencing until after the schematic and layout have been synchronized) and import it to the Layout.
6. As you import this new ECO you will be presented with the usual synchronization options. However, this time select the "Synchronize by Reference Designators Only" option. This is a very important step since the pieces you have copied carry internal data associated with another project and we need to replace this older internal synch data with that of the new project. Since you have spaced out the reference designators to avoid any overlaps in the earlier step it is safe to proceed with the import to the new layout.

Once the import is completed the new schematic is synchronized with your new layout. You can now proceed with alterations as needed. From this point you can use the normal ECO options.

At the moment this is restricted. Future versions should have this option added. For now you just have to replace the hole with the correct size.

In order to be able to create symbols which will rotate incrementally these symbols can only be created using Line-Segments and round pads (Classic Gerber constraint). Ovals and Rectangles currently must be approximated using line segments. PCB-ST provides many short-cut graphic symbols which will only rotate in 90 degree increments. Thus if you plan to be rotating devices in angles other than 90 degrees you MUST create the footprints using only line segments and round pads.

The Target symbol is used for registration purposes. Its use is less and less these days as more fabricators modernize and use other fabrication methodologies.

The Holes tool is just that holes. However unless appropriately marked the fabricator will plate them as well

McCad PCB-ST does not make the distinction between a plated and a non-plated hole. Currently this is usually done by layer management. Generally, all holes are assumed to be plated by default. Therefore for those situations where you do not wish plating you would provide specific instructions to the fabricator.

There is a recommended process for dealing with a large mixture of plated and non-plated holes.

1. All plated holes are placed on say the Common pads layer.
2. All non-plated holes are placed on a different data layer.
3. When making drill templates you then have to make Two (2) templates; one from the plated data layer and another from the non-plated layer.
4. When you exported the Excellon drill file, the system will find both templates and export them into a single file with a break between the two drill templates. You can then split the single drill file at the break or provide instructions that one group is plated and the other is non-plated.

The standard construction for footprints is to make sure that they are built with pin #1 in the upper left hand corner relative to all the other pins. Then you must set the device datum at or near pin one. When you set the datum for a part in the lower right each time the part is placed into the editing window with the datum at 1000 x and 1000 y. In the later situation with the datum in the wrong spot some of the device's elements may be now offscreen and inaccessible.

To fix this you would do a Select All command and drag all the elements into view. Next you would either respecify the datum or possibly rotate the device so that the datum is in the upper left relative to the other elements.

The problem you are having is caused by the fact that your design requires more than 249 different Aperture definitions to reproduce in Gerber. This is rare but can happen. After the Gerber table is full, the system defaults to aperture code D10 and then begins drawing the remaining elements with that D10 aperture. Unfortunately for small SMT features the drawing algorithm may break down especially when one aspect of the SMT pad may be smaller than the feature dimensions currently in the Gerber table's D10 position. Drawing with the D10 Aperture should be avoided in SMT designs as a general rule.

You can try to fix this by changing the dimension of D10 from its normal default value of 10 to 4. You should be able to regenerate a Gerber output without this problem. This change allows the drawing algorithm to draw with a smaller pen size on the smaller SMT features.

This is usually a result of one of the following situations.

• The specified dimensions exceed the Aperture size limit (typically set to 0.400") for most photo plotters. The result is that the Gerber software paints the pad using a smaller aperture. For example if you specified a pad to be 0.035" by 6.055" the larger dimension will exceed the 0.400" limit. The paint algorithm would produce a pad on the film which would measure 0.034" by 6.054" with the corners edges rounded. This is normal and to be expected. The painting of features works best with even dimensions.

• In the rare situations where you have specified more unique features than can be held in the Gerber translator's Aperture Table, all those features not found on the table will be painted and subject to the evens rule mentioned previously.

To avoid this problem do not make distorted pads (avoid ratios greater than 4:1) when you should be using lines and specify device features wisely keeping in mind that the aperture table does have limits and machines have physical constraints.